CORE

Computer Architecture

24CSO843 · S8 · 4 credits

Official KTU 2024 syllabus subject — study with practice, PYQs and AI tools.

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Syllabus
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Modules
Module 01Fundamentals of Quantitative Design and Analysis (6 hours)expand

Introduction, Classes of computers, Defining Computer Architecture – Trends in Technology – Trends in Power and Energy in Integrated Circuits – Trends in Cost – Dependability – Measuring, Reporting and Summarizing Performance – Quantitative Principles of Computer Design.

Module 02Pipelining: Basic and Intermediate Concepts (8 hours)expand

Basic and Intermediate pipelining Concepts, The Major Hurdle of Pipelining – Pipeline Hazards, Pipelining Implementation, Implementation issues that makes Pipelining hard, The MIPS R4000 Pipeline, Extending the MIPS Pipeline to Handle Multicycle Operations.

Module 03Instruction-Level Parallelism and Its Exploitation(8 hours)expand

Instruction-Level Parallelism: Concepts and Challenges – Basic Compiler Techniques for Exposing ILP – Reducing Branch Costs with Prediction – Overcoming Data Hazards with Dynamic Scheduling – Dynamic Scheduling – Hardware-Based Speculation – Exploiting ILP Using Multiple Issue and Static Scheduling, Advanced Techniques for Instruction Delivery and Speculation, Studies of the Limitations of ILP

Module 04Data and Thread-Level Parallelism (7 hours)expand

Vector Architecture – SIMD Instruction Set Extensions for Multimedia – Graphics Processing Units – Centralized Shared-Memory Architectures – Performance of Shared-Memory Multiprocessors – Distributed Shared Memory, Models of Memory Consistency, Multicore Processors and Their Performance.

Module 05Memory Hierarchy Design (7 hours)expand

Review of Memory Hierarchy Design, Cache Performance, Basic Cache Optimizations, Virtual Memory, Protection: Virtual Memory and Virtual Machines, Advanced Optimizations of Cache Performance, Crosscutting Issues: The Design of Memory Hierarchies.

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